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The QuiXilica VXS family are flexible analog and digital VITA 41.0 VXS I/O products. High performance analog and digital I/O front ends are combined with a scalable FPGA based processing architecture. Memory and inter-processor communication resources are optimized for very high performance real time DSP applications. QuiXilica includes development kits, FPGA cores and software, giving users power and flexibility while retaining consistency and ease of use.  These products can be used without a backplane if desired.

The QuiXilica V6 Architecture meets the needs of demanding sensor-processing applications across a range of environments.  The QuiXilica V6 architecture uses the latest field programmable gate array (FPGA) based processors - the Xilinx Virtex®-6 family, advanced DDR3 SDRAM, and the latest communications technologies available.  Full ruggedization has been designed into the architecture from the outset to provide products suitable for harsh demanding environments and deployed systems. 
 

For a complete information download the QuiXilica V5 whitepaper.

 

 
ADCs and DACs at a Glance
 
QuiXilica-V6 Product Features
  • 3 Xilinx Virtex-V6 devices (LX240, SX315, or SX475)
  • 5 GB of DDR3 SDRAM memory, aggregate throughput of 32 GB/s across six banks
  • Onboard Gigabit Ethernet network with front panel (SFP) and VITA 41.6 P0 interface
  • Front panel CXP module, 12 fibers at up to 6.4 Gb/s, aggregate throughput of 9.3 GB/s in each direction
  • VMEbus interface for control / status and system management
  • Optional VITA 41 high speed P0 adds dual 4x full duplex links at up to 6.4 Gb/s plus additional VITA 41.11 user I/O via RTM
  • Local system management processor
  • VME 6U form factor, VITA 41 compliant

Product ADC Inputs DAC Outputs

Proteus-V6

2 x 5.0 GSPS x 10-bit or
4 x 2.5 GSPS x 10-bit or
8 X 1.25 GSPS x 10-bit

 

Calypso-V6

2 x 3.6 GSPS x 12-bit or
6 x 1.8 GSPS x 12-bit
 

Gemini-V6

1 x 3.6 GSPS x 12-bit or
3 x 1.8 GSPS x 12-bit
1 x 4.0 GSPS x 12-bit

Triton-V6*

1 x 2.2 GSPS x 10-bit 1 x 4.0 GSPS x 12-bit

Atlas-V6

8 x 1.0 GSPS x 12-bit  

Charon-V6

  8 x 1.2 GSPS x 14-bit

Titan-V6

4 x 1.0 GSPS x 12-bit 4 x 1.2 GSPS x 14-bit

 * data sheet not yet finalized

 

QuiXilica-V5 Product Features
  • 512 MB DDR3 memory per FPGA (3x)
  • 1x front panel QSFP slot for 4x 3.75 Gb/s max
  • 2x front panel SFP+ slots for 3.75 Gb/s max
  • Dual 4x full duplex VXS links
  • QuiXstart FPGA configuration system
  • VME/VXS form factor, VITA 41 compliant
Product ADC Inputs DAC Outputs

Neptune-V5

2 x 2.2 GSPS x 10-bit  

Orion-V5

  2 x 4.0 GSPS x 12-bit

Triton-V5

1 x 2.2 GSPS x 10-bit 1 x 4.0 GSPS x 12.bit

Atlas-V5

8 x 1.0 GSPS x 12-bit  

Charon-V5

  8 x 1.2 GSPS x 14-bit

Titan-V5

4 x 1.0 GSPS x 12-bit  4 x 1.2 GSPS x 14-bit

Tarvos-V5

6 x 185 MSPS x 16-bit 1 x 185 MSPS x 16-bit
 
 

 

 


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