The QuiXilica VXS family of digitizers are flexible analog and digital VITA 41.0 VXS I/O products. High performance analog and digital I/O front ends are combined with a scalable FPGA based processing architecture. Memory and inter-processor communication resources are optimized for very high performance real time DSP applications. QuiXilica includes development kits, FPGA cores and software, giving users power and flexibility while retaining consistency and ease of use. These products can be used without a backplane if desired.
The QuiXilica V5 Architecture meets the needs of demanding sensor-processing applications across a range of environments. The QuiXilica V5 architecture uses the latest field programmable gate array (FPGA) based processors - the Xilinx Virtex®-5 family, advanced DDR3 SDRAM, and the latest communications technologies available. Full
has been designed into the architecture from the outset to provide products suitable for harsh demanding environments and deployed systems.
on the features and advantages of the QuiXilica V5 Architecture.
| Product |
ADC |
DAC |
BANDWIDTH |
#
OF CHANNELS
|
RESOLUTION |
FPGA |
FRONT
PANEL I/O
|
MEMORY
|
FORM FACTOR
|
| Neptune-V5 |
Yes |
|
2.2 Gsps |
2 |
10-bits ADC |
3 V-5
SXT, LXT or FXT
|
6 front panel high speed serial ports at 3.75 Gb/s each
|
1 GB DDR3 Memory per FPGA
|
6U VXS |
Triton VXS
|
Yes |
Yes
|
2 Gsps
|
|
|
V2 Pro 70
|
2x Front Panel SFP Slots for 2.5 Gb/s Fiber or Copper Transceivers |
2x DDR SDRAM banks 512 MB/bank
2x DDR SDRAM SODIMM slots, up to 2 GB each
|
6U VXS |
| Neptune VXS |
Yes |
|
2 Gsps
|
2 |
10-bits |
V2 Pro 70 |
2x Front Panel SFP Slots for 2.5 Gb/s Fiber or Copper Transceivers
|
2x DDR SDRAM banks 512 MB/bank
2x DDR SDRAM SODIMM slots, up to 2 GB each |
6U VXS
|
Tarvos VXS
|
Yes |
Yes |
160 Msps
|
|
|
V2 Pro 70 |
2x Front Panel SFP Slots for 2.5 Gb/s Fiber or Copper Transceivers
|
2x DDR SDRAM banks 512 MB/bank
2x DDR SDRAM SODIMM slots, up to 2 GB each |
6U VXS
|
Janus VXS
|
|
Yes |
500 Msps
|
7 |
16-bits DAC
|
V2 Pro 70 |
2x Front Panel SFP Slots for 2.5 Gb/s Fiber or Copper Transceivers
|
2x DDR SDRAM banks 512 MB/bank
2x DDR SDRAM SODIMM slots, up to 2 GB each |
6U VXS
|
Callisto VXS
|
N/A |
N/A |
N/A
|
12 (digital)
|
N/A
|
V2 Pro 70 (5x)
|
2x Front Panel SFP Slots for 2.5 Gb/s Fiber or Copper Transceivers |
Front panel - up to 12x 2.5 Gb/s links through fiber or copper SFP Transceivers |
6U VXS |
Venus VXS
|
Yes |
|
105 Msps |
5 |
14-bits |
V2 Pro 70 |
2x Front Panel SFP Slots for 2.5 Gb/s Fiber or Copper Transceivers
|
2x DDR SDRAM banks 512 MB/bank
2x DDR SDRAM SODIMM slots, up to 2 GB each |
6U VXS
|
QuiXilica Digitizers - Virtex-5 based
Neptune-V5 VXS
• 2 channel 10-bit 2.2 Gsps ADC
• 6 front panel high speed serial ports at 3.75 Gb/s each
• 1 GB DDR3 Memory per FPGA Superior SNR and SFDR
• Three Xilinx Virtex-5 SXT, LXT or FXT
• Convection or Conduction Cooled
• Dual 4x Full Duplex VXS Links
• 2x Full Duplex Vita 41.6 Ethernet Links
• Advanced Temperature and Current Monitoring
• QuiXstart FPGA Configuration System
• Developer’s Kit: FPGA interface Cores, Software and Reference Design
• VME/VXS form factor, VITA 41.0 Compliant
QuiXilica Digitizers at a Glance
Callisto VXS
• Five VC2VP50 FPGAs provide high bandwidth communications links
• High performance FPGA Based Communications management and processing platform
• Fits in Switch card position in VXS backplane
• High Performance FPGA Based Communications Management and Processing Platform
Triton VXS
• Dual Channel, 2 Gsps ADC and DAC Combo Digitizer
• 1x 10-bit 2 Gsps Atmel ADC/DMUX
• 1x 12-bit 2 Gsps Euvis MUX/DAC
• 2x Front Panel SFP Slots for 2.5 Gb/s Fiber or Copper Transceivers
• 2x DDR SDRAM SODIMM Slots, Up to 2 GB Each
• Large FPGA Processing Engine
Neptune VXS
• Dual Channel 2 Gsps ADC Digitizer
• 2x 10-bit 2 Gsps Atmel ADC/DMUX
• 2x Front Panel SFP Slots for 2.5 Gb/s Fiber/Copper Transceivers
• 2x DDR SDRAM SODIMM Slots, Up to 2 GB Each
• Large FPGA Processing Engine
Tarvos VXS
• 6x 16-bit 160 Msps ADC channels based on LTC2209
• One 16-bit 500 Msps DAC channel based on MAX5891
• 2x front-panel SFP slots for 2.5 Gb/s fiber or copper transceivers
• 2x on-board DDR SDRAM banks 512 MB/bank
• 2x DDR SDRAM SODIMM slots, up to 2 GB each
• Large FPGA Processing Engine
Janus VXS
• 7 x 16-bit 500 Msps DAC channels, based on MAX5891
• 2 x front-panel SFP slots for 2.5 Gb/s fiber or copper transceivers
• 2 x on-board DDR SDRAM banks, 512 MB per bank
• 2 x DDR SDRAM SODIMM slots, up to 2 GB each
• Large FPGA Processing Engine
