Triton VXS
Datasheet (PDF)
The QuiXilica TRITON VXS is part of the QuiXilica VXS family of FPGA based processing hardware. The QuiXilica VXS family provides a complete range of flexible analog and digital IO products in the VITA 41.0 VXS form f actor. The product range couples high performance analog and digital IO front ends with a scalable FPGA based processing architecture. Memory and inter-processor communications resources have been optimized to address the requirements of very high performance real time digital signal processing applications. This family of products is supported by a range of development kits, FPGA cores and software, providing users with power and flexibility while retaining consistency and ease of use across the range.
Key applications for the TRITON VXS include radar, electronic warfare, software radio and telecommunications.The Quixilica VXS family includes flexible analog and digital IO products based on the VITA 41.0 VXS standard.

• Single Channel, 2 GS/s ADC/DAC and Xilinx Virtex-II Pro FPGA Processing Engine
• 1x 10 bit 2 GS/s Atmel ADC/DMUX
• 1x 12 bit 2 GS/s Euvis MUX/DAC
• VME/VXS form factor, VITA 41.0 Compliant, 8x 3.125 Gbit/s serial I/O links
• 2x Front Panel SFP slots for 2.5 Gbit/s fiber or copper transceivers
• 2x DDR SDRAM SODIMM Slots, up to 2 GB each
• 2x On-Board DDR SDRAM Banks, 0.5 GB each
• QuiXstart flexible FPGA configuration system
• Developer’s Kit available with FPGA interface cores, software and reference design
Hardware Description
The TRITON VXS is a 6U form factor card that can be employed as a payload card as defined in the VITA 41.0 VXS specification. The card can also be deployed in a standard VME 64 chassis if the P0 connector is not populated. The VME 64 interface is used only for powering the card - the VME bus interface itself is not implemented. Control and high speed data IO for the card will be implemented using the high speed serial links available on the front panel and/or the backplane P0 connector.
TRITON VXS is supplied with a standard FPGA bitstream and Windows based software application for a single channel, snapshot data capture system and a single channel arbitrary waveform generator. A standard Gigabit Ethernet link to the front panel is used to interface to the host PC.
A hardware reference manual provides users with sufficient detail to develop their own FPGA based applications. For rapid development, an additional Developers Kit can be purchased which contains FPGA interface cores, software and source code for the snapshot data capture system and arbitrary waveform generator as a reference design.
For additional information download the data sheet.
Application Example:
High Resolution Range-Doppler Radar Demonstrator Based on a Commercially Available FPGA Card
Authors:
Henning Nicolaisen#1, Tor Holmboe*2, Karina Vieira Hoel*3, Stein Kristoffersen*4
#University of Oslo, Department of Informatics P.O. Box 1080 Blindern, NO-0316 Oslo, Norway
* Norwegian Defence Research Establishment P.O. Box 25, NO-2027 Kjeller, Norway
Abstract— An X-band high resolution range-Doppler radar demonstrator has been developed, based on a commercially available 6U-VXS form-factor digital signal processing card containing all necessary base-band circuitry. The custom design covers a radio frequency up-down converter, FPGA firmware and PC software. The practical signal bandwidth is close to 1GHz and the range resolution is close to 15cm. The functionality has been demonstrated in a free space radiation experiment.
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