The QuiXilica Janus VXS is part of the Quixilica VXS family of FPGA based processing hardware. The QuiXilica VXS family provides a complete range of flexible analog and digital IO products in the VITA 41.0 VXS form factor. The QuiXilica family couples high performance analog and digital IO front ends with a scalable FPGA based processing architecture. Memory and inter-processor communications resources have been optimized to address the requirements of very high performance real time digital signal processing applications. The Quixilica family is supported by a range of development kits, FPGA cores and software, providing users with power and flexibility while retaining consistency and ease of use.

Key applications for the Janus VXS include radar, electronic warfare, software radio, automatic test equipment, scientific instrumentation and telecommunications.

Features:
•    7 x 16-bit 500 MSPS DAC channels, based on MAX5891
•    Xilinx XC2VP70 FPGA
•    VME/VXS form factor, VITA 41.0 compliant, 8 x 3.125 Gbps serial I/O links
•    2 x front-panel SFP slots for 2.5 Gbps fiber or copper transceivers
•    2 x on-board DDR SDRAM banks, 512 MB per bank
•    2 x DDR SDRAM SODIMM slots, up to 2 GB each
•    Quixstart flexible FPGA configuration system
•    Developer’s Kit available, containing FPGA interface cores, software and reference design

Hardware Description
The Janus VXS is a 6U form factor card that can be employed as a payload card as defined in the VITA 41.0 VXS specification. The card can also be deployed in a standard VME 64 chassis if the P0 connector is not populated. The VME 64 interface is used only for powering the card - the VME bus interface itself is not implemented. Control and high speed data IO for the card is implemented using the high speed serial links available on the front panel and/or the backplane P0 connector. The card can also be used
standalone (i.e. without a backplane). The Janus VXS is supplied with a standard FPGA bitstream
and Windows based software application for a multichannel, arbitrary waveform generator. A standard Gigabit Ethernet link to the front panel is used to interface the card to the host PC.

A hardware reference manual provides sufficient detail to develop FPGA based applications for the card entirely from scratch. However, for rapid development, an additional Developer’s Kit can be purchased which contains FPGA interface cores, software and source code for the arbitrary waveform generator system as a reference design.