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FPGA Solutions
QuiXilica Digitizers
QuiXilica Digitizers Virtex-5 FPGA : Atlas-V5 VXS Eight 12-bit ADCs at 1.0 GSPS Each | Calypso-V5 VXS 2 12-bit ADCs 3.2 GSPS | Charon-V5 VXS Eight 12-bit DACs at 1.2 GSPS Each | Neptune-V5 VXS Two 10-bit ADC at 2.2 GSPS Each | Orion-V5 VXS Two 12-bit DACs up to 4.0 GSPS | Proteus-V5 VXS Two 10-bit ADCs at 5 GSPS | Tarvos-V5 VXS Six 185 MSPS ADC, One DAC | Titan-V5 VXS Eight Channels: Four ADC, Four DAC | Triton-V5 VXS One 10-bit ADC Input at 2.2 GSPS | VXS Developers Kit
VXS Developers Kit : Callisto VXS Up to 16 Payload slots | Janus VXS | Neptune VXS | Tarvos VXS | Triton VXS | Venus VXS
VXS Developers Kit : Quixilica QuiXstream | Quixilica Serial FPDP Core
VXS Developers Kit :


VXS Developers Kit

Application Developers' Kit
To accelerate the development process, a Developer’s Kit can be purchased for all VXS products which provides FPGA cores, software and source code reference design examples. This allows rapid interfacing of user applications to the on-board memory resources and off-board data links. The kit includes a design example showing how to achieve simple raw mode data links via the backplane to other FPGA based VXS payload cards, such as those in the Quixilica range. A further example illustrates use of the front panel data links to link the card to an external host via a UDP/Gigabit Ethernet link.
This kit provides the following items:

• Quixilica Quixtream UDP/Gigabit Ethernet FPGA Cores host software (Windows),
• DDR SDRAM FIFO Interface FPGA Cores,
• Setup files and instructions for Quixstart FPGA configuration system,
• Reference designs - VHDL and C software source code for:
        -UDP Gigabit Ethernet communications loopback and memory test,
        -VXS Backplane raw mode data transfer example. (Data transfer with VXS Payload cards),
• User manuals for all of the kit components and reference design.