The QuiXilica Saturn-V6 VME / VXS is a 6U ANSI/VITA 41 (VXS) compliant high-speed signal processing board combining high density FPGA devices with twelve fiber optic I/O channels at up to 6.4 Gb/s. By employing three Xilinx Virtex-6 FPGAs, Tekmicro’s Saturn-V6 offers unmatched FPGA processing density per channel making it ideal for high channel count signal processing in applications using fiber optic as a transport for Digital IF.
The Saturn-V6 is available for a wide range of operating environments including commercial grade, rugged air cooled, and conduction cooled to support deployed applications such as unmanned airborne, naval and ground vehicles. For more details, see Tekmicro’s Ruggedization Data Sheet.
In addition to Saturn-V6, Tekmicro offers a broad range of Xilinx Virtex-6 based streaming I/O and FPGA processing solutions for both analog and digital I/O in a range of form factors.
Multi-channel fiber optic I/O to 6.4 Gb/s
Supports a wide range of Digital IF sensor formats
Flexible P2 I/O Options including RACE++
Supports direct integration with legacy RACE++ processing resources
Twelve fiber optic interfaces running at up to 6.4 Gb/s using CXP front panel connection
Flexible data movement across the front panel for use in standard VME environments
One SFP port for Gigabit Ethernet connectivity
Network access and data movement to FPGSs via on-board Gigabit Ethernet switch
Dual 4x full duplex VXS links and 2 full duplex VITA 41.6 ethernet link
Enhanced VXS capability
Three large pin count (1759 pin package) Xilinx Virtex®-6 devices available per board (LX240, SX315, or SX475). other configurations available
Matched FPGA processing and analog data bandwidth for dense channel count systems
5 GB DDR3 SDRAM Memory
Large memory resources for application flexibility
Two fully independent banks of (72 Mb/bank) QDRII+ memory on backend FPGA
Advanced temperature and current monitoring
Protection from damage and usable in customer applications
Comprehensive developer’s kit provided including FPGA interface cores, QuiXstart FPGA utilities, software and reference designs
Faster application development
Convection or conduction cooled options
Ruggedization designed in for demanding deployed applications
Front Panel High Speed Serial I/O
One 12-fiber CXP site is provided on the front panel for standard protocols such as Gigabit Ethernet and Serial FPDP (ANSI/VITA 17.1). VITA 49 Digital IF standards can also be supported with appropriate firmware.
Xilinx Virtex-6 FPGAs are the heart of the Saturn-V6. The FPGAs interface between the fiber optic transceivers, memory and I/O resources to provide a platform for implementing high performance real time processing. The Saturn-V6 is configured with three Xilinx Virtex-6 devices (LX240, SX315 or SX475). All FPGAs are interconnected by wide parallel LVDS busses and via high speed Aurora serial links using the Xilinx GTX transceivers.
VXS Backplane High Speed Serial I/O
The Saturn-V6 can be used as a VITA 41.0 payload card. Up to eight high speed serial links of up to 3.125 Gb/s full duplex data rates are supported via VITA 41.0 MultiGig RT2 P0 connector. Custom or standard communication protocols can be run over these links by providing appropriate firmware in the FPGA.
QuiXstart FPGA Configuration
A number of options are available for configuring the FPGA on the Saturn-V6. A JTAG connection is available to allow users to configure the FPGA via standard Xilinx development tools. Onboard flash is available and can configure the FPGA on power up. Tekmicro’s QuiXstart tool supports flexible configuration of the FPGA through a Gigabit Ethernet link from a remote server after a power up or reset event.
High Speed Parallel LVDS Interconnectivity
All FPGAs are also interconnected with a number of LVDS pairs for optimized data transfer as the block diagram shows.
The Saturn-V6 has two independent banks of onboard DDR3 SDRAM for each FPGA. The front end FPGAs have two 1 GB banks, each with throughput of 6.4 GB/s, while the back end FPGA has two 512 MB banks, each with throughput of 3.2 GB/s. The total memory capacity is 5 GB with aggregate throughput of 32 GB/s across six banks. All DDR3 memory banks are clocked at 400 MHz for an 800 MT/s transfer rate. In addition, there are two fully independent banks of QDRII+ SRAM memory for the back end FPGA. Each QDRII+ device has a 72 Mbit capacity (144 Mbit total) supported by an 18-bit data bus per bank.
System Monitoring / Damage Protection
The Saturn-V6 includes facilities to monitor current and temperature at various points on the board. Current monitoring of all main power rails is available through the use of a Spartan-6 FPGA. Die temperature monitoring of the three FPGAs and temperature monitoring of three locations on the PCB is also available. This allows a first level of protection when the Saturn-V6 is operating in different environmental scenarios. The output from the sensors is available to the user’s FPGA firmware applications, to allow the application to adapt to changes in environmental conditions. The Saturn-V6 also uses the system monitoring sensors to implement a system protection mechanism which will, independently of the user’s application, prevent excessive current or temperature from damaging the board.
Front Panel High Speed Serial Interface
12x Fiber Optic Transceivers on CXP module
Up to 6.4 Gb/s, 8B/10B encoding
Range of standard protocols, including Gigabit Ethernet and Serial FPDP.
DDR3 SDRAM (2 fully independent banks per FPGA) Size: 1 GB per front end bank, 512 GB total per back end bank Bus Width: 64-bits per front end bank, 32-bits per back end bank Speed: 400 MHz clock rate, 800 MT/s
QDRII + SRAM (2 fully independent banks for backend FPGA) Size: 72Mbits per backend bank (144Mbits total) Bus Width: 18-bits per bank Speed: Up to 500MHz clock rate
Front panel SFP for fiber or copper Gigabit Ethernet
VITA 41.6 P0 interface for 1000BASE-KX Gigabit Ethernet
Onboard Gigabit Ethernet switch
Access to Virtex-6 FPGAs is available via custom JTAG cable assembly that interfaces with the standard Xilinx JTAG programming cable.
Standard 6U VMEbus board, single slot
Optional VXS P0 connector for backplane I/O
+5V, +3.3V, ±12V from backplane. Power consumption is dependent on customer application. Power estimation model is provided as part of the Developers Kit.
Contact factory for additional performance details.