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QuiXilica Firmware Cores
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 Tekmicro designs FPGA-based DSP cores for customers using the QuiXxilica Core library. This library is of a structural format incorporating optimized placement information for targeting Xilinx Virtex devices, and creating Relationally Placed Macros (RPM). This offers deterministic size and high-speed operation, which is beneficial when planning designs. These cores are delivered as netlists, allowing customers to incorporate the cores into their own designs. We also carry out complete "System on a Chip" design of DSP subsystems. In this case, the cores are delivered as bitstream files to be downloaded directly to the target device, or as netlists where some additional functionality is to be provided by the customer.
Available links to their descriptions are below.
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